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ECE NEWS :The Electrical & Computer Engineering Department Newsletter


Year in Review 2010-2011

Featured Articles

A matter of timing: New strategies for de-bugging electronics

Monroe manufacturer partners with WEMPEC on electric truck

Jack Ma: Record fast transistors and innovative imaging systems

Insect hearing inspires new approach to small antennas

Making waves with high-power materials

ECE grads receive college Distinguished Achievement Awards

Regular Features



STUDENT NEWS 1: Competition winners

Awards and fellowships




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A computer chip

A matter of timing: New strategies for de-bugging electronics

Decorative initial cap The components that make up the integrated circuits in electronic devices are nano-sized and number in the billions. Sometimes “bugs” lurking in these complex systems can emerge and cause significant performance errors.

One category of electronic bugs that can occur after a chip is fabricated is known as timing errors. These errors can cause components to slow down and take longer to execute operations. As components continue to become smaller, the process of preventing and solving timing errors is becoming ever more complex, increasing the time it takes to send new products to market.

Assistant Professor Azadeh Davoodi is one of the first people to look at solutions for timing errors, and she has received a 2011 Faculty Early Career Development Award (CAREER) and grant from the National Science Foundation.

Azadeh Davoodi

Azadeh Davoodi

Integrated circuits go through a rigorous testing process to find and correct bugs that can cause performance errors. However, the small size and sheer volume of components mean chips realistically cannot be entirely validated before fabrication. “These errors occur, not because the circuit isn’t functioning correctly, but because it fails to operate correctly at the desired speed,” Davoodi says. “The nanoscale components in the chip are so small they can have weird physical behaviors that can only be detected after they are fabricated.”

The validation process involves manually opening up a chip and examining billions of transistors, which is extremely time-consuming. Timing errors often are interdependent, meaning they emerge only when certain operations are performed together. Testing for timing errors requires predicting the chip’s behavior during a vast number of possible operations and combinations of operations.

It can take several months to find errors and alter chips during the validation process. Most of this time is spent dealing with timing errors. Davoodi’s team will develop special sensor components that can be added to a chip’s design, as well as methods to analyze measurements from the components. The new components will provide custom timing information for a particular chip design, allowing developers to predict, detect and even solve errors more quickly. Instead of manually opening up and examining chips, developers simply could use data from the sensor components as a compact representation of important areas of the design that may be causing timing errors.

In addition to supporting cutting-edge research, CAREER awards also fund innovative outreach programs. Davoodi is developing technical coursework to introduce students to sophisticated software programming and creating a unique course module that explores the One Laptop Per Child project. The module will be incorporated into InterEgr 102: Introduction to Society’s Engineering Grand Challenges.


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Date last modified: Monday,8-August-2011
Date created: 8-August-2011