Lipasti, Mikko H.

My research interests include compiler optimization, runtime and operating systems, and the interaction of both with computer architecture. Specifically, I am interested in software techniques, hardware techniques, and combined hardware/software techniques for both improving the absolute performance of microprocessors and computer systems as well as reducing the complexity of implementation of such high-performance systems.

Improved computer system performance is brought about by increased processor throughput. The optimization of instruction throughput in superscalar processors can be broken down into three primary problems: supplying adequate instruction flow, enabling efficient register data flow, and providing high-bandwidth and low-latency memory data flow. The first of these, instruction flow, is close to being a solved problem for the next five or ten years. The second, register data flow, has been solved at a conceptual level, but practical implementation issues continue to restrict its efficiency, and hence, interesting research issues remain. Furthermore, the recent discovery of properties like value locality and program redundancy create additional opportunities for improving register data flow beyond historical limits. The third problem, memory data flow, remains the most significant and largely unsolved challenge facing computer architects today. Packaging constraints and technology trends will continue to limit the bandwidth and/or latency to a memory that is large enough to hold the working set of entire programs, forcing computer architects to come up with clever ways of utilizing limited bandwidth and tolerating long latencies.

Files and Links of Interest

My Unofficial Home Page
Proposal for a Persistent Conference Review System
TPC-W in Java: Our implementation of TPC-W in Java
Workshop on Duplicating, Deconstructing, and Debunking

Copyright 2008 The Board of Regents of the University of Wisconsin System
Date last modified: 08-Apr-2008
Content by: mikkoatengrdotwiscdotedu
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