To become familiar with automated and manual techniques for generating tests for faults in digital circuits and systems and automated techniques for evaluating those tests. To understand techniques that can be used by the designer to make testing a circuit for faults possible and economical. To learn techniques for building in test capability in a circuit to make it self-testing.

The following statement indicates which of the following considerations are included in this course: economic, environmental, ethical, political, societal, health and safety, manufacturability, sustainability.

Computer Usage:

The course requires use of Sun workstations with a locally developed suite of fault simulation and test pattern generation software tools that can be combined manually or with Unix scripts to produce an ATPG system.

Approximately eight homework sets are given covering: fault modeling, fault simulation techniques, manual and automatic test pattern generation, checking experiments, microprocessor and memory testing, ad hoc and structured design for testability techniques, pattern generators and response analyzers.

Projects:

All student must do a course project. The standard project is to design an efficient test set for a large combinational circuit, verify its effectiveness, use it to identify faulty circuits, and use it to locate faults in a circuit. This project uses the test tools software extensively and is performed by individual students. Alternative projects are to use a sequential test pattern generator for ad hoc design for testability or a group project to develop a new test tool.