ECE 551: Digital System Design and Synthesis

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ECE 551 - Digital System Design and Synthesis

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ECE 551: Digital System Design and Synthesis, Spring 2007 (Schulte)

ECE 551: Digital System Design and Synthesis, Fall 2006 (Schulte)

ECE 551: Digital System Design and Synthesis, Spring 2006 (Schulte)

ECE 551: Digital System Design and Synthesis, Spring 2003 (Kime)

ECE 551: Digital System Design and Synthesis, Fall 2002 (Schulte)

ECE 551: Digital Design and Synthesis, Spring 2002 (Saluja)

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Catalog Description

551 Digital System Design and Synthesis. I, II; cr. Introduction to the use of hardware description languages and automated synthesis in design. Advanced design principles. Verilog and VHDL description languages. Synthesis for hardware description languages. Timing-oriented synthes. Relation of integrated circuit layout to timing-oriented design. Design for reuse. P: ECE/Comp Sci 352 & Jr st.

Course Prerequisite(s)

ECE 352

Prerequisite knowledge and/or skills

Understanding and application of Boolean algebra
Ability to perform basic digital logic design
Basic programming skills

Textbook(s) and/or other required material

Primary Text: Michael D. Ciletti, Advanced Digital Design with the Verilog HDL, Prentice Hall, 2003.
Supplementary Text: Michael D. Ciletti, Starter's Guide to Verilog 2001, Pearson Prentice Hall, 2004.
Tutorials for Modelsim and Synopsys EDA tools

Course objectives

Develop ability to use a hardware description language, simulation, and a logic synthesis tool in the design and verification of digital circuits
Understand design in a contemporary environment resulting from the use of deep-submicrometer implementation technologies and design reuse.

Topics covered

INTRODUCTION
REVIEW OF COMBINATIONAL AND SEQUENTIAL LOGIC DESIGN
STRUCTURAL MODELS OF COMBINATIONAL LOGIC
LOGIC SIMULATION
PROPAGATION DELAY
USER DEFINED PRIMITIVES
BEHAVIORAL MODELS OF COMBINATIONAL AND SEQUENTIAL LOGIC
SYNTHESIS OF COMBINATIONAL AND SEQUENTIAL LOGIC
DESIGN AND SYNTHESIS OF DATAPATH CONTROLLERS
ARITHMETIC PROCESSORS
POSTSYNTHESIS DESIGN TASKS

Class/laboratory schedule

three 50-minute or two 75-minute lectures/week

Contribution of course to meeting the professional component

This course contributes primarily to the students' knowledge of engineering topics, and does provide design experience.

The following statement indicates which of the following considerations are included in this course: economic, environmental, ethical, political, societal, health and safety, manufacturability, sustainability.

economic manufacturability

Relationship of course to undergraduate degree program objectives and outcomes

This course primarily serves students in the department. The information below describes how the course contributes to the undergraduate program objectives.

knowledge in the basic techniques of mathematics and the physical sciences advanced expertise in design, analysis, and fabrication techniques within a student-selected electrical and computer engineering concentration area

Assessment of student progress toward course objectives

Students are assessed via graded homework, a midterm and final examination, and an application-specific integrated circuit design project, which takes into account both cost and performance.

Person(s) who prepared this description

Volkan Kursun

Copyright 2008 The Board of Regents of the University of Wisconsin System
Date last modified: 01-Feb-2008
Content by: ece@engr.wisc.edu
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